Comparison of computational efficiency of various implementations of FFT algorithm on DSP processor
Jakub Banach
University of Warmia and Mazury in OlsztynMichał Śmieja
University of Warmia and Mazury in OlsztynDEng. – doctor in the Faculty of Technical Sciences at University of Warmia and Mazury in Olsztyn He is member of the Polish Society of Technical Diagnostics since 2016. His main interest focus on the use of the communication end embedded solutions in control and diagnostic mechatronic systems.
Abstract
The ongoing development of hardware solutions enabling more efficient signal processing is influencing the development of capabilities for reasoning about the state of technical objects. At the same time, solutions for processing data in close proximity to the technical object – edge computing – are becoming more widespread. In an era of new possibilities and expectations regarding signal processing, it is necessary to select a computing unit and a computational algorithm implementation tailored to the process being carried out. This article examines the performance of various implementations of the commonly used FFT algorithm in terms of execution time and energy consumption on a selected computing unit – the ADSP-SC589 DSP controller. The study examined implementations using the SIMD architecture of the computing unit, as well as implementations using a hardware calculation accelerator built into the device structure. The obtained results suggest significant improvement in signal processing algorithm execution time (around 40 times shorter) of SIMD based implementation as well as minor reduction of power consumption, as well as very high improvement in execution time of hardware accelerator based implementation (around 1000 times shorter) at cost of increased power consumption. The results suggest various implementations significantly differ from each other, and show clear benefits of code optimization based on specific architecture as well as hardware acceleration.
Keywords:
DSP, signal processing, edge computing, hardware accelerationReferences
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University of Warmia and Mazury in Olsztyn
University of Warmia and Mazury in Olsztyn
<p style="widows: 2; page-break-inside: avoid; orphans: 2; margin-right: 0.05cm; margin-bottom: 0.35cm; line-height: 100%;" align="justify"><span style="font-size: small;">DEng. – doctor in the Faculty of Technical Sciences at University of Warmia and Mazury in Olsztyn He is member of the Polish Society of Technical Diagnostics since 2016. His main interest focus on the use of the communication end embedded solutions in control and diagnostic mechatronic systems.</span></p> Poland
DEng. – doctor in the Faculty of Technical Sciences at University of Warmia and Mazury in Olsztyn He is member of the Polish Society of Technical Diagnostics since 2016. His main interest focus on the use of the communication end embedded solutions in control and diagnostic mechatronic systems.
